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Barretenberg
The ZK-SNARK library at the core of Aztec
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#include <graph.hpp>
Public Member Functions | |
| StaticAnalyzer_ ()=default | |
| StaticAnalyzer_ (const StaticAnalyzer_ &other)=delete | |
| StaticAnalyzer_ (StaticAnalyzer_ &&other)=delete | |
| StaticAnalyzer_ & | operator= (const StaticAnalyzer_ &other)=delete |
| StaticAnalyzer_ && | operator= (StaticAnalyzer_ &&other)=delete |
| StaticAnalyzer_ (CircuitBuilder &circuit_builder, bool connect_variables=true) | |
| Construct a new StaticAnalyzer for Ultra Circuit Builder or Mega Circuit Builder. | |
| std::vector< uint32_t > | to_real (std::vector< uint32_t > &variable_indices) |
| Convert a vector of variable indices to their real indices. | |
| uint32_t | to_real (const uint32_t &variable_index) const |
| std::optional< size_t > | find_block_index (const auto &block) |
| this method finds index of the block in circuit builder by comparing pointers to blocks | |
| void | process_gate_variables (std::vector< uint32_t > &gate_variables, size_t gate_index, size_t blk_idx) |
| this method processes variables from a gate by removing duplicates and updating tracking structures | |
| std::unordered_map< uint32_t, size_t > | get_variables_gate_counts () const |
| void | process_execution_trace () |
| std::vector< uint32_t > | get_arithmetic_gate_connected_component (size_t index, size_t block_idx, auto &blk) |
| this method creates connected components from arithmetic gates | |
| std::vector< uint32_t > | get_elliptic_gate_connected_component (size_t index, size_t block_idx, auto &blk) |
| this method creates connected components from elliptic gates | |
| std::vector< uint32_t > | get_plookup_gate_connected_component (size_t index, size_t block_idx, auto &blk) |
| this method creates connected components from plookup gates | |
| std::vector< uint32_t > | get_sort_constraint_connected_component (size_t index, size_t block_idx, auto &blk) |
| this method creates connected components from sorted constraints | |
| std::vector< uint32_t > | get_poseido2s_gate_connected_component (size_t index, size_t block_idx, auto &blk) |
| this method creates connected components from poseidon2 gates | |
| std::vector< uint32_t > | get_non_native_field_gate_connected_component (size_t index, size_t block_idx, auto &blk) |
| this method creates connected components from Non-Native Field gates (bigfield operations) | |
| std::vector< uint32_t > | get_memory_gate_connected_component (size_t index, size_t block_idx, auto &blk) |
| this method creates connected components from Memory gates (RAM and ROM consistency checks) | |
| std::vector< uint32_t > | get_rom_table_connected_component (const bb::RomTranscript &rom_array) |
| this method gets the ROM table connected component by processing ROM transcript records | |
| std::vector< uint32_t > | get_ram_table_connected_component (const bb::RamTranscript &ram_array) |
| this method gets the RAM table connected component by processing RAM transcript records | |
| std::vector< uint32_t > | get_databus_connected_component (size_t index, size_t block_idx, auto &blk) |
| this method creates connected components from databus gates | |
| std::vector< uint32_t > | get_eccop_connected_component (size_t index, size_t block_idx, auto &blk) |
| std::vector< uint32_t > | get_eccop_part_connected_component (size_t index, size_t block_idx, auto &blk) |
| this method creates connected components from elliptic curve operation gates | |
| void | add_new_edge (const uint32_t &first_variable_index, const uint32_t &second_variable_index) |
| this method creates an edge between two variables in graph. All needed checks in a function above | |
| void | depth_first_search (const uint32_t &variable_index, std::unordered_set< uint32_t > &is_used, std::vector< uint32_t > &connected_component) |
| this method implements depth-first search algorithm for undirected graphs | |
| void | mark_range_list_connected_components () |
| this method marks some connected componets like they represent range lists tool needs this method to remove range lists because after method finalize was called because they aren't connected to other variables in a circuit. It's intended behaviout but the tool shows them as another connected component | |
| void | mark_finalize_connected_components () |
| this method marks some connected components like they represent separated finalize blocks the point is finalize method create additional gates for ecc_op in databus in Mega case and they aren't connected to other variables in the circuit. It's intended behaviour but the tool shows them as another connected component | |
| void | mark_process_rom_connected_component () |
| this method marks some connected components if they were created by function process_rom_array. the point is process_ROM_array function uses only create_sorted_ROM_gate function internally for sorted_ROM_gate we know that (q_memory, q_1, q_2) == (1, 1, 1), so if all variables in connected_component are contained only in this type of gate, we can remove this connected component from the scope, cause it's a result of process_ROM_array function | |
| bool | is_gate_sorted_rom (size_t memory_block_idx, size_t gate_idx) const |
| this method checks if current gate is sorted ROM gate | |
| bool | variable_only_in_sorted_rom_gates (uint32_t var_idx, size_t blk_idx) const |
| this method checks that every gate for given variable in a given block is sorted ROM gate | |
| std::vector< ConnectedComponent > | find_connected_components () |
| this methond finds all connected components in the graph described by adjacency lists and marks some of them as connected components that were created with functions in method finalize_circuit | |
| bool | check_vertex_in_connected_component (const std::vector< uint32_t > &connected_component, const uint32_t &var_index) |
| void | connect_all_variables_in_vector (const std::vector< uint32_t > &variables_vector) |
| this method connects 2 variables if they are in one gate and 1) have different indices, 2) not constant variables, 3) their indices != 0 | |
| bool | check_is_not_constant_variable (const uint32_t &variable_index) |
| this method checks whether the variable with given index is not constant | |
| void | save_constant_variable_indices () |
| this method needs to save all constant variables indices in one data structure in order to not go through whole map constant variable indices every time when tool checks that variable isn't constant | |
| size_t | process_current_decompose_chain (size_t index) |
| this method removes variables that were created in a function decompose_into_default_range because they are false cases and don't give any useful information about security of the circuit. decompose_into_default_range function creates addition gates with shifts for intermediate variables, i.e. variables from left, right and output wires. They have variable gates count = 1 or 2, but they are not dangerous. so, we have to remove these variables from the analyzer. The situation is dangerous, if first variable from accumulators have variables gate count = 1. It means that it was used only in decompose gate, and it's not properly constrained. | |
| void | process_current_plookup_gate (size_t gate_index) |
| this method removes false cases in lookup table for a given gate. it uses all functions above for lookup tables to remove all variables that appear in one gate, if they are not dangerous | |
| void | remove_unnecessary_decompose_variables (const std::unordered_set< uint32_t > &decompose_variables) |
| this method removes unnecessary variables from decompose chains | |
| void | remove_unnecessary_plookup_variables () |
| this method removes false cases plookup variables from variables in one gate | |
| void | remove_unnecessary_range_constrains_variables () |
| this method removes variables from range constraints that are not security critical | |
| void | remove_unnecessary_aes_plookup_variables (bb::plookup::BasicTableId &table_id, size_t gate_index) |
| this method removes false positive cases variables from aes plookup tables. AES_SBOX_MAP, AES_SPARSE_MAP, AES_SPARSE_NORMALIZE tables are used in read_from_1_to_2_table function which return values C2[0], so C3[0] isn't used anymore in these cases, but this situation isn't dangerous. So, we have to remove these variables. | |
| void | remove_unnecessary_sha256_plookup_variables (bb::plookup::BasicTableId &table_id, size_t gate_index) |
| this method removes false cases in sha256 lookup tables. tables which are enumerated in the unordered set sha256_plookup_tables are used in read_from_1_to_2_table function which return C2[0], so C3[0] isn't used anymore, but this situation isn't dangerous. So, we have to remove these variables. | |
| void | remove_record_witness_variables () |
| this method removes record witness variables from variables in one gate. initially record witness is added in the circuit as ctx->add_variable(0), where ctx – circuit builder. then aren't used anymore, so we can remove from the static analyzer. | |
| std::unordered_set< uint32_t > | get_variables_in_one_gate () |
| this method returns a final set of variables that were in one gate | |
| std::pair< std::vector< ConnectedComponent >, std::unordered_set< uint32_t > > | analyze_circuit (bool filter_cc=true) |
| this functions was made for more convenient testing process | |
| void | print_connected_components_info () |
| this method prints additional information about connected components that were found in the graph | |
| void | print_variables_gate_counts () |
| this method prints a number of gates for each variable | |
| void | print_arithmetic_gate_info (size_t gate_idx, auto &block) |
| this method prints all information about arithmetic gate where variable was found | |
| void | print_elliptic_gate_info (size_t gate_idx, auto &block) |
| this method prints all information about elliptic gate where variable was found | |
| void | print_plookup_gate_info (size_t gate_idx, auto &block) |
| this method prints all information about plookup gate where variable was found | |
| void | print_poseidon2s_gate_info (size_t gate_idx, auto &block) |
| this method prints all information about poseidon2s gate where variable was found | |
| void | print_nnf_gate_info (size_t gate_idx, auto &block) |
| this method prints all information about non natife field gate where variable was found | |
| void | print_memory_gate_info (size_t gate_idx, auto &block) |
| this method prints all information about memory gate where variable was found | |
| void | print_delta_range_gate_info (size_t gate_idx, auto &block) |
| this method prints all information about range constrain gate where variable was found | |
| void | print_variable_info (const uint32_t real_idx) |
| this method prints all information about gates where variable was found | |
| ~StaticAnalyzer_ ()=default | |
Private Attributes | |
| CircuitBuilder & | circuit_builder |
| bool | connect_variables |
| std::unordered_map< uint32_t, std::vector< uint32_t > > | variable_adjacency_lists |
| std::unordered_map< uint32_t, size_t > | variables_gate_counts |
| std::unordered_map< uint32_t, size_t > | variables_degree |
| std::unordered_map< KeyPair, std::vector< size_t >, KeyHasher, KeyEquals > | variable_gates |
| std::unordered_set< uint32_t > | variables_in_one_gate |
| std::unordered_set< uint32_t > | fixed_variables |
| std::unordered_set< uint32_t > | constant_variable_indices_set |
| std::vector< ConnectedComponent > | connected_components |
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default |
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delete |
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delete |
| cdg::StaticAnalyzer_< FF, CircuitBuilder >::StaticAnalyzer_ | ( | CircuitBuilder & | circuit_builder, |
| bool | connect_variables = true |
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| ) |
Construct a new StaticAnalyzer for Ultra Circuit Builder or Mega Circuit Builder.
| FF | field type used in the circuit |
| CircuitBuilder |
| CircuitBuilder | |
| connect_variables |
This constructor initializes the graph structure by: 1) Creating data structures for tracking:
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default |
| void cdg::StaticAnalyzer_< FF, CircuitBuilder >::add_new_edge | ( | const uint32_t & | first_variable_index, |
| const uint32_t & | second_variable_index | ||
| ) |
| std::pair< std::vector< ConnectedComponent >, std::unordered_set< uint32_t > > cdg::StaticAnalyzer_< FF, CircuitBuilder >::analyze_circuit | ( | bool | filter_cc = true | ) |
this functions was made for more convenient testing process
| FF | |
| CircuitBuilder |
it's important to mention that if you want to use this function and get all cc, you have to change flag filter_cc IN tests, because by default it's true
| bool cdg::StaticAnalyzer_< FF, CircuitBuilder >::check_is_not_constant_variable | ( | const uint32_t & | variable_index | ) |
| bool cdg::StaticAnalyzer_< FF, CircuitBuilder >::check_vertex_in_connected_component | ( | const std::vector< uint32_t > & | connected_component, |
| const uint32_t & | var_index | ||
| ) |
| void cdg::StaticAnalyzer_< FF, CircuitBuilder >::connect_all_variables_in_vector | ( | const std::vector< uint32_t > & | variables_vector | ) |
| void cdg::StaticAnalyzer_< FF, CircuitBuilder >::depth_first_search | ( | const uint32_t & | variable_index, |
| std::unordered_set< uint32_t > & | is_used, | ||
| std::vector< uint32_t > & | connected_component | ||
| ) |
| std::optional< size_t > cdg::StaticAnalyzer_< FF, CircuitBuilder >::find_block_index | ( | const auto & | block | ) |
| std::vector< ConnectedComponent > cdg::StaticAnalyzer_< FF, CircuitBuilder >::find_connected_components | ( | ) |
this methond finds all connected components in the graph described by adjacency lists and marks some of them as connected components that were created with functions in method finalize_circuit
| FF | |
| CircuitBuilder |
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inline |
this method creates connected components from arithmetic gates
| FF | field type |
| CircuitBuilder |
| index | index of the current gate |
| block_idx | index of the current block |
| blk | block containing the gates |
Processes both regular arithmetic gates and minigates, handling fixed witness gates and different arithmetic operations based on selector values
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inline |
this method creates connected components from databus gates
| FF | field type |
| CircuitBuilder | |
| index | index of the current gate |
| block_idx | index of the current block |
| blk | block containing the gates |
Processes databus read operations by collecting variables from left and right wires
| std::vector< uint32_t > cdg::StaticAnalyzer_< FF, CircuitBuilder >::get_eccop_connected_component | ( | size_t | index, |
| size_t | block_idx, | ||
| auto & | blk | ||
| ) |
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inline |
this method creates connected components from elliptic curve operation gates
| FF | field type |
| CircuitBuilder | |
| index | index of the current gate |
| block_idx | index of the current block |
| blk | block containing the gates |
Processes elliptic curve operations by collecting variables from current and next gates, handling opcodes and coordinate variables for curve operations
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inline |
this method creates connected components from elliptic gates
| FF | field type |
| CircuitBuilder |
| index | index of the current gate |
| block_idx | index of the current block |
| blk | block containing the gates |
Handles both elliptic curve addition and doubling operations, collecting variables from current and next gates as needed
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inline |
this method creates connected components from Memory gates (RAM and ROM consistency checks)
| FF | field type |
| CircuitBuilder |
| index | index of the current gate |
| blk_idx | index of the current block |
| block | block containing the gates |
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inline |
this method creates connected components from Non-Native Field gates (bigfield operations)
| FF | field type |
| CircuitBuilder |
| index | index of the current gate |
| blk_idx | index of the current block |
| block | block containing the gates |
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inline |
this method creates connected components from plookup gates
| FF | field type |
| CircuitBuilder |
| index | index of the current gate |
| block_idx | index of the current block |
| block | block containing the gates |
Processes plookup gates by collecting variables based on selector values, including variables from the next gate when necessary
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inline |
this method creates connected components from poseidon2 gates
| FF | field type |
| CircuitBuilder |
| index | index of the current gate |
| blk_idx | index of the current block |
| block | block containing the gates |
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inline |
this method gets the RAM table connected component by processing RAM transcript records
| FF | field type |
| CircuitBuilder | |
| ultra_builder | circuit builder containing the gates |
| ram_array | RAM transcript containing records with witness indices and gate information |
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inline |
this method gets the ROM table connected component by processing ROM transcript records
| FF | field type |
| CircuitBuilder |
| rom_array | ROM transcript containing records with witness indices and gate information |
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inline |
this method creates connected components from sorted constraints
| FF | field type |
| CircuitBuilder |
| index | index of the current gate |
| block_idx | index of the current block |
| block | block containing the gates |
Processes delta range constraints by collecting all wire indices from the current gate
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inline |
| std::unordered_set< uint32_t > cdg::StaticAnalyzer_< FF, CircuitBuilder >::get_variables_in_one_gate | ( | ) |
| bool cdg::StaticAnalyzer_< FF, CircuitBuilder >::is_gate_sorted_rom | ( | size_t | memory_block_idx, |
| size_t | gate_idx | ||
| ) | const |
| void cdg::StaticAnalyzer_< FF, CircuitBuilder >::mark_finalize_connected_components | ( | ) |
this method marks some connected components like they represent separated finalize blocks the point is finalize method create additional gates for ecc_op in databus in Mega case and they aren't connected to other variables in the circuit. It's intended behaviour but the tool shows them as another connected component
| FF | |
| CircuitBuilder |
| void cdg::StaticAnalyzer_< FF, CircuitBuilder >::mark_process_rom_connected_component | ( | ) |
this method marks some connected components if they were created by function process_rom_array. the point is process_ROM_array function uses only create_sorted_ROM_gate function internally for sorted_ROM_gate we know that (q_memory, q_1, q_2) == (1, 1, 1), so if all variables in connected_component are contained only in this type of gate, we can remove this connected component from the scope, cause it's a result of process_ROM_array function
| FF | |
| CircuitBuilder |
| void cdg::StaticAnalyzer_< FF, CircuitBuilder >::mark_range_list_connected_components | ( | ) |
this method marks some connected componets like they represent range lists tool needs this method to remove range lists because after method finalize was called because they aren't connected to other variables in a circuit. It's intended behaviout but the tool shows them as another connected component
| FF | |
| CircuitBuilder |
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delete |
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delete |
| void cdg::StaticAnalyzer_< FF, CircuitBuilder >::print_arithmetic_gate_info | ( | size_t | gate_index, |
| auto & | block | ||
| ) |
| void cdg::StaticAnalyzer_< FF, CircuitBuilder >::print_connected_components_info | ( | ) |
| void cdg::StaticAnalyzer_< FF, CircuitBuilder >::print_delta_range_gate_info | ( | size_t | gate_index, |
| auto & | block | ||
| ) |
| void cdg::StaticAnalyzer_< FF, CircuitBuilder >::print_elliptic_gate_info | ( | size_t | gate_index, |
| auto & | block | ||
| ) |
| void cdg::StaticAnalyzer_< FF, CircuitBuilder >::print_memory_gate_info | ( | size_t | gate_index, |
| auto & | block | ||
| ) |
| void cdg::StaticAnalyzer_< FF, CircuitBuilder >::print_nnf_gate_info | ( | size_t | gate_idx, |
| auto & | block | ||
| ) |
| void cdg::StaticAnalyzer_< FF, CircuitBuilder >::print_plookup_gate_info | ( | size_t | gate_index, |
| auto & | block | ||
| ) |
| void cdg::StaticAnalyzer_< FF, CircuitBuilder >::print_poseidon2s_gate_info | ( | size_t | gate_index, |
| auto & | block | ||
| ) |
| void cdg::StaticAnalyzer_< FF, CircuitBuilder >::print_variable_info | ( | const uint32_t | real_idx | ) |
| void cdg::StaticAnalyzer_< FF, CircuitBuilder >::print_variables_gate_counts | ( | ) |
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inline |
this method removes variables that were created in a function decompose_into_default_range because they are false cases and don't give any useful information about security of the circuit. decompose_into_default_range function creates addition gates with shifts for intermediate variables, i.e. variables from left, right and output wires. They have variable gates count = 1 or 2, but they are not dangerous. so, we have to remove these variables from the analyzer. The situation is dangerous, if first variable from accumulators have variables gate count = 1. It means that it was used only in decompose gate, and it's not properly constrained.
| FF | |
| CircuitBuilder |
| ultra_circuit_constructor | |
| variables_in_one_gate | |
| index |
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inline |
| void cdg::StaticAnalyzer_< FF, CircuitBuilder >::process_execution_trace | ( | ) |
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inline |
this method processes variables from a gate by removing duplicates and updating tracking structures
| FF | field type |
| CircuitBuilder |
| gate_variables | vector of variables to process |
| gate_index | index of the current gate |
| block_idx | index of the current block |
The method performs several operations: 1) Removes duplicate variables from the input vector 2) Converts each variable to its real index using to_real 3) Creates key-value pairs of (variable_index, block_index) for tracking 4) Updates variable_gates map with gate indices for each variable 5) Increments the gate count for each processed variable
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inline |
this method removes record witness variables from variables in one gate. initially record witness is added in the circuit as ctx->add_variable(0), where ctx – circuit builder. then aren't used anymore, so we can remove from the static analyzer.
| FF | |
| CircuitBuilder |
|
inline |
this method removes false positive cases variables from aes plookup tables. AES_SBOX_MAP, AES_SPARSE_MAP, AES_SPARSE_NORMALIZE tables are used in read_from_1_to_2_table function which return values C2[0], so C3[0] isn't used anymore in these cases, but this situation isn't dangerous. So, we have to remove these variables.
| FF | |
| CircuitBuilder |
| table_id | |
| gate_index |
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inline |
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inline |
| void cdg::StaticAnalyzer_< FF, CircuitBuilder >::remove_unnecessary_range_constrains_variables | ( | ) |
this method removes variables from range constraints that are not security critical
| FF | field type |
| CircuitBuilder |
Right now static analyzer removes two types of variables: 1) Variables from delta_range_constraints created by finalize_circuit() 2) Variables from range_constraints created by range_constraint_into_two_limbs
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inline |
this method removes false cases in sha256 lookup tables. tables which are enumerated in the unordered set sha256_plookup_tables are used in read_from_1_to_2_table function which return C2[0], so C3[0] isn't used anymore, but this situation isn't dangerous. So, we have to remove these variables.
| FF | |
| CircuitBuilder |
| table_id | |
| gate_index |
| void cdg::StaticAnalyzer_< FF, CircuitBuilder >::save_constant_variable_indices | ( | ) |
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| bool cdg::StaticAnalyzer_< FF, CircuitBuilder >::variable_only_in_sorted_rom_gates | ( | uint32_t | var_idx, |
| size_t | blk_idx | ||
| ) | const |
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